High-speed signal board PCB design optimization solution

时间2021/11/2 15:32:11
With the pursuit of higher performance of electronic products, semiconductor technology continues to develop, the signal operating frequency continues to increase, and the rise or fall time of the signal is thus continuously shortened, resulting in signal integrity problems such as reflection and crosstalk on the transmission line. . When we were designing a PCB, we had to consider how the signal could be transmitted better on the printed circuit board without distortion. This article takes the LVDS signal as an example to illustrate the general optimization method for high-speed signals in PCB design.
LVDS (Low Voltage Differential Signaling) is a low-swing differential signaling technology that allows signals to be transmitted at hundreds of Mbps over differential PCB pairs or balanced cables with low and low currents. The drive output achieves low noise and low power consumption.
The LVDS signal is not only a differential signal but also a high speed digital signal. Therefore, measures must be taken for the PCB pairs used to transmit LVDS to prevent signals from being reflected at the media terminals, and electromagnetic interference should be reduced to ensure signal integrity. Some issues to be aware of when wiring PCBs are as follows.
(1) In the form of a multi-layer board structure, since the LVDS signal belongs to a high-speed signal board, the layer adjacent thereto should be a ground layer, and the LVDS signal should be shielded to prevent interference. For boards with a very low density, it is best to separate the LVDS signal from the other signals in different layers, as physical space conditions permit.

(2) Control the transmission line impedance, the impedance requirements of various differential lines are different. According to the design requirements, the differential impedance and the corresponding line width spacing are calculated by the impedance meter software and set to the constraint manager. The differential lines are coupled to each other to reduce common mode interference. When conditions permit, they should be routed as parallel as possible. There should be no vias or other signals in between the two lines. The differential pair needs to be strictly controlled in phase, so the internal control needs to be strictly controlled.

(3) Obey the principle of tight coupling. When the distance between two differential signal lines is very close, the current transmission direction is opposite, the magnetic fields cancel each other, the electric fields are coupled to each other, and the electromagnetic radiation is much smaller. In order to reduce the loss, a high-speed differential line can be added with a via hole in the vicinity of the layer-changing hole.

(4) The trace is as short and straight as possible. The radiation intensity of the signal is proportional to the trace length of the signal line. The longer the high-frequency signal lead, the easier it is to couple to the component close to it. Therefore, high-frequency signal board lines such as signal clock, crystal oscillator, DDR data, LVDS line, USB line, HDMI line, etc. are required to be as short as possible. Avoid too many turns, the lead wire of the high-frequency circuit wiring is best to use a full line, need to turn, bend 45% or arc as much as possible to avoid 90? corner; this requirement is only used to improve the copper foil in the low-frequency circuit The fixation strength, while at high frequencies, satisfies this requirement but can reduce the external body and mutual coupling of high frequency signals. The number of vias in the wiring and other factors that cause line discontinuities should be minimized.
(5) The spacing between different differential pairs should not be too small. LVDS has no restrictions on the choice of routing. Microstrip and stripline can be used, but care must be taken to have a good reference plane. The spacing between different differential pairs should not be too small, at least greater than the difference between 3 and 5 digits. If necessary, the ground holes can be isolated between the different differential lines to prevent crosstalk between each other.
(6) The LVDS signal is far away from other signals. For LVDS signals and other signals, such as TTL letters, it is better to use different trace layers. If the same layer of traces must be used because of design constraints, the distance between the LVDS trace and the TTL trace should be far enough, at least greater than the differential line spacing of 3 to 5 bits.
(7) LVDS differential signals can not be split across planes. Although the two differential signals are each a return path, cross-plane segmentation does not cut the signal backflow, but the transmission line across the plane will result in impedance discontinuity due to the lack of a reference plane.
(8) The matching resistor at the receiving end should be as close as possible to the receiving pin, the distance should be as short as possible, and the wiring distance should be as short as possible.
(9) Control the accuracy of the matching resistor, and use the terminal matching resistor to match the differential transmission line. The resistance is generally between 90 and 130 Ω. The circuit also needs to use this termination matching resistor to generate a differential voltage that operates normally. For a point-to-point topology, the impedance of the trace is usually controlled at 100?, but the matching resistor can be adjusted according to the actual situation.
(10) Unused pin processing, all unused LVDS receiver input pins are left floating, all unused LVDS and TTL output pins are left floating, all unused TTL transmit/driver inputs and control/enable pins Connect to power or ground.




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